Dual Add/Subtract (Floating-Pt) - Analog Devices ADSP-2106x SHARC User Manual

Multifunction
B Compute Operations
Dual Add/Subtract (Floating-Pt.)
Floating-Point:
Syntax:
Fa = Fx + Fy, Fs = Fx – Fy
Compute Field:
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 1 1 1 1
Function:
Does a dual add/subtract of the floating-point operands in registers Fx
and Fy. The normalized results are placed in registers Fa and Fs: the sum
in Fa and the difference in Fs. Rounding is to nearest (IEEE) or by
truncation, to a 32-bit or to a 40-bit boundary, as defined by the rounding
mode and rounding boundary bits in MODE1. Post-rounded overflow
returns ±Infinity (round-to-nearest) or ±NORM.MAX (round-to-zero).
Post-rounded denormal returns ±Zero. Denormal inputs are flushed to
±Zero. A NAN input returns an all 1s result.
Status flags:
AZ Is set if either of the post-rounded results is a denormal (unbiased
exponent < –126) or zero, otherwise cleared
AU Is set if either post-rounded result is a denormal, otherwise cleared
AN Is set if either of the floating-point results is negative, otherwise
cleared
AV Is set if either of the post-rounded results overflows (unbiased
exponent > +127), otherwise cleared
AC Is cleared
AS Is cleared
AI Is set if either of the input operands is a NAN, or if both of the input
operands are Infinities, otherwise cleared
B – 78
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FS FA FX FY