E.16 Link Assignment Register (Lar) - Analog Devices ADSP-2106x SHARC User Manual

E Control/Status Registers
E.16 LINK ASSIGNMENT REGISTER (LAR)
The LAR register is used to select link port to link buffer connections.
LAR is memory-mapped at address 0x00C8. [This register is not available
on the ADSP-21061.] After reset LAR is initialized to 0x0002 C688,
assigning Link Port 0 to Link Buffer 0, Link Port 1 to Link Buffer 1, Link
Port 2 to Link Buffer 2, Link Port 3 to Link Buffer 3, Link Port 4 to Link
Buffer 4, and Link Port 5 to Link Buffer 5.
Bits Name
0-2 A0LB*
3-5 A1LB*
6-8 A2LB*
9-11 A3LB*
12-14 A4LB*
15-17 A5LB*
18-31 reserved
* AxLB Link Port #
000 Link Port 0
001 Link Port 1
010 Link Port 2
011 Link Port 3
100 Link Port 4
101 Link Port 5
110 reserved
111 inactive buffer
LAR
0x00C8
17 16
1
A5LB
Link Port Assigned to LBUF5
A4LB
Link Port Assigned to LBUF4
A3LB
Link Port Assigned to LBUF3
All control and status bits are active high unless otherwise
noted. Default bit values after reset are shown; if no value
is shown, the bit is undefined at reset or depends upon
processor inputs. Reserved bits are shown with a gray
background. Reserved bits should always be written with zeros.
E – 46
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Description
Link port assignment for LBUF0
Link port assignment for LBUF1
Link port assignment for LBUF2
Link port assignment for LBUF3
Link port assignment for LBUF4
Link port assignment for LBUF5
31 30 29 28 27 26 25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
0 1 1 0 0 0 1 1 0
0 0 0 0 0 0
7 6 5 4 3 2 1 0
1 0 0 0 1 0 0 0
A0LB
Link Port Assigned to LBUF0
A1LB
Link Port Assigned to LBUF1
A2LB
Link Port Assigned to LBUF2