Compute / Dreg÷Dm / Dreg÷Pm - Analog Devices ADSP-2106x SHARC User Manual

Compute and Move
A Instruction Set Reference
compute / dreg DM / dreg PM
Syntax:
compute,
Function:
Parallel accesses to data memory and program memory from the register
file. The specified I registers address data memory and program memory.
The I values are post-modified and updated by the specified M registers.
Pre-modify offset addressing is not supported.
Note: See Section 4.4.1, "DAG Register Transfer Restrictions", in
Chapter 4, Data Addressing.
Examples:
R7=BSET R6 BY R0, DM(I0,M3)=R5, PM(I11,M15)=R4;
R8=DM(I4,M1), PM(I12 M12)=R0;
Opcode:
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
D
0 0 1 M DMI
D
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DMD and PMD select the access types (read or write). DMDREG and
PMDREG specify register file locations. DMI and PMI specify I registers
for data and program memory. DMM and PMM specify M registers used
to update the I registers. The COMPUTE field defines a compute
operation to be performed in parallel with the data accesses; this is a
NOP if no compute operation is specified in the instruction.
A – 16
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DM(Ia, Mb) = dreg1 , PM(Ic, Md) = dreg2
dreg1 = DM(Ia, Mb) dreg2 = PM(Ic, Md)
P DM
DMM M DREG PMI
D
COMPUTE
;
PM
PMM DREG