D.5 Device Identification Register - Analog Devices ADSP-2106x SHARC User Manual

JTAG Test Access Port
D.5 DEVICE IDENTIFICATION REGISTER
No device identification register is included in the ADSP-2106x.
D.6 BUILT-IN SELF-TEST OPERATION (BIST)
No self-test functions are supported by the ADSP-2106x.
D.7 PRIVATE INSTRUCTIONS
Loading a value of 001xx into the instruction register enables the
private instructions reserved for emulation. The ADSP-2106x EZ-ICE
emulator uses the TAP and boundary scan as a way to access the
processor in the target system. The EZ-ICE emulator requires a target
board connector for access to the TAP. See "EZ-ICE Emulator" in
Chapter 11, System Design, for information on this connector.
D.8 REFERENCES
IEEE Standard 1149.1-1990. Standard Test Access Port and Boundary-Scan Architecture.
To order a copy, contact IEEE at 1-800-678-IEEE.
Maunder, C.M. & R. Tulloss. Test Access Ports and Boundary Scan Architectures.
IEEE Computer Society Press, 1991.
Parker, Kenneth. The Boundary Scan Handbook.
Kluwer Academic Press, 1992.
Bleeker, Harry, P. van den Eijnden, & F. de Jong. Boundary-Scan Test—A Practical Approach.
Kluwer Academic Press, 1993.
Hewlett-Packard Co. HP Boundary-Scan Tutorial and BSDL Reference Guide.
(HP part# E1017-90001.) 1992.
www.BDTIC.com/ADI
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