Table 5.7 External Memory Interface Signals - Analog Devices ADSP-2106x SHARC User Manual

5 Memory
The internal 32-bit DM Address bus and the I/O processor can access
the entire 4-gigaword external memory space. The 24-bit PM Address
bus, however, can only access 12 megawords of external memory
because of its smaller width.
Pin Type
ADDR I/O/T
31-0
DATA I/O/T
47-0
MS
O/T
3-0
RD
I/O/T
Table 5.7 External Memory Interface Signals (cont. on next page)
5 – 36
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Function
External Bus Address. The ADSP-2106x outputs addresses for
external memory and peripherals on these pins. In a
multiprocessor system the bus master outputs addresses for
read/writes of the internal memory or IOP registers of other
ADSP-2106xs. The ADSP-2106x inputs addresses when a host
processor or multiprocessing bus master is reading or writing
its internal memory or IOP registers.
External Bus Data. The ADSP-2106x inputs and outputs data
and instructions on these pins. 32-bit single-precision floating-
point data and 32-bit fixed-point data is transferred over bits
47-16 of the bus. 40-bit extended-precision floating-point data
is transferred over bits 47-8 of the bus. 16-bit short word data
is transferred over bits 31-16 of the bus. Pull-up resistors on
unused DATA pins are not necessary.
Memory Select Lines. These lines are asserted (low) as chip
selects for the corresponding banks of external memory.
Memory bank size must be defined in the ADSP-2106x's
system control register (SYSCON). The
decoded memory address lines that change at the same time as
the other address lines. When no external memory access is
MS
occurring the lines are inactive; they are active,
3-0
however, when a conditional memory access instruction is
executed, whether or not the condition is true.
used with the PAGE signal to implement a bank of DRAM
memory (Bank 0). In a multiprocessing system the
are output by the bus master.
Memory Read Strobe. This pin is asserted (low) when the
ADSP-2106x reads from external memory devices or from the
internal memory of other ADSP-2106xs. External devices
(including other ADSP-2106xs) must assert
the ADSP-2106x's internal memory. In a multiprocessing
RD
system is output by the bus master and is input by all
other ADSP-2106xs.
MS
lines are
3-0
MS
can be
0
MS
lines
3-0
RD
to read from