Multiprocessor Booting - Analog Devices ADSP-2106x SHARC User Manual

11.6.5

Multiprocessor Booting

Multiprocessor systems can be booted from a host processor, from
external EPROM, through a link port, or from external memory.
11.6.5.1 Multiprocessor Host Booting
To boot multiple ADSP-2106x processors from a host, each
ADSP-2106x must have its EBOOT, LBOOT, and
for host booting: EBOOT=0, LBOOT=0, and
powerup, each ADSP-2106x will be in the idle state and the
request lines will be deasserted. The host must assert the
and boot each ADSP-2106x by asserting its
instructions as described in "Host Booting" above.
11.6.5.2 Multiprocessor EPROM Booting
There are two methods of booting a multiprocessor system from an
EPROM. Processors perform the following steps in these methods:
• Arbitrate for the bus
• DMA the 256 word boot stream, after becoming bus master
• Release the bus
• Execute the loaded instructions
All ADSP-2106xs boot in turn from a single EPROM.
BMS
The signals from each ADSP-2106x may be wire-ORed together to
drive the chip select pin of the EPROM. Each ADSP-2106x can boot in
turn, according to its priority. When the last one has finished booting,
it must inform the others (which may be in the idle state) that program
execution can begin (if all SHARCs are to begin executing instructions
simultaneously). An example system that uses this processors-take-
turns technique appears in Figure 11.12. When multiple SHARCs boot
from one EPROM, the SHARCs can boot either identical code or
different code from the EPROM. If the processors load differing code, a
jump table (based on processor ID) can be used to select the code for
each processor.
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System Design
BMS
pins configured
BMS
=1. After system
BR
HBR
CS
pin and downloading
11
x bus
input
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