Analog Devices ADSP-2106x SHARC User Manual page 697

TCLKDIV ................................................. 10-14
TCOUNT register ........................... 3-33, 3-34
TDM (time division multiplexed) ......... 10-1,
.................................................. 10-2, 10-25
Termination ..................... 9-26, 11-16, 11-19,
................................................ 11-21, 11-26
Termination condition .................... 3-8, 3-13,
.................... 3-15, 3-16, 3-17, 3-18, 3-19,
............................. 11-40, A-5, A-36, A-38
TF condition ........................................ 3-7, 3-8
TFS (transmit frame sync) .................... 10-20,
.................................................. 10-26, E-49
TFSDIV ..................................................... 10-14
Throughput ................................. 11-44, 11-47
TIMEN bit (MODE2 register) ................. 3-34
Timer .............................................. 3-33, 11-11
Timer enable ................................... 3-34, E-16
Timer interrupt ........... 3-9, 3-21, 3-22, 3-29,
.......................................... 3-34, 3-35, 3-37
Timer interrupt priority ................ 3-25, 3-27
TIMEXP ........................................... 3-33, 3-34
TMZHI interrupt ...................................... 3-25
TMZLI interrupt ....................................... 3-25
TPERIOD register ..................................... 3-33
Transfer control block (TCB) ................. 6-28,
........................................... 6-31, 6-32, G-4
Transmission lines .................................. 11-26
Transmit divisor ..................................... 10-13
Transmit underflow status bit
(TUVF) ........................ 10-7, 10-8, 10-25
TRST ............................................... 11-8, 11-13
TRUE ............................................................ 3-7
TRUNC bit (MODE1 register) . 2-5, 2-6, 2-7
Truncation ........................ 1-5, 2-6, 2-7, 2-15
Two-dimensional array addressing ....... 6-22
Two-dimensional DMA ............................. 6-7
Twos-complement numbers ..................... 2-6
Type 10 instruction .................................. 8-36
U
UARTs ........................................................ 10-3
Unbanked memory ... 5-38, 5-41, 5-42, E-32
Unbanked memory wait states .............. 5-39
Underflow ................... 2-16, B-74, B-75, C-4
Underflow exception ................................. 2-3
Universal registers ..... 1-11, 2-28, 3-5, 4-11,
.......... 6-34, 11-42, A-4, A-5, A-6, A-12,
.......................................... A-40, A-41, E-2
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Index
User-defined status flags ........................... 3-5
USTAT1 ............................................... 3-5, E-3
USTAT2 ............................................... 3-5, E-3
V
Vector data types ........................................ 1-6
Vector interrupt ........ 3-21, 3-22, 3-25, 3-32,
................ 3-37, 7-32, 11-34, 11-44, 11-47
Vector interrupt pending ........................ E-31
VIPD bit (SYSTAT register) .................... 3-32
VIRPT register ............. 3-9, 3-22, 3-29, 7-32,
..................................................... 7-33, 8-31
VIRPTI interrupt ....................................... 3-25
W
WAIT register ............ 5-39, 5-41, 5-42, 5-44
Wait state mode ........................................ 5-41
Wait states ......... 3-24, 5-38, 5-39, 8-3, 11-4,
............. 11-5, 11-22, 11-29, 11-34, 11-38,
................................................. 11-40, 11-45
WR ................................................ 11-22, 11-24
X
no entries
Y
no entries
Z
no entries
X – 11