Multiplier; Multiplier Operation - Analog Devices ADSP-2106x SHARC User Manual

Computation Units
2.6

MULTIPLIER

The multiplier performs fixed-point or floating-point multiplication and fixed-
point multiply/accumulate operations. Fixed-point multiply/accumulates may
be performed with either cumulative addition or cumulative subtraction.
Floating-point multiply/accumulates can be accomplished through parallel
operation of the ALU and multiplier, using multifunction instructions. See
"Multifunction Computations" later in this chapter.
Multiplier floating-point instructions operate on 32-bit or 40-bit floating-point
operands and output 32-bit or 40-bit floating-point results. Multiplier fixed-point
instructions operate on 32-bit fixed-point data and produce 80-bit results. Inputs
are treated as fractional or integer, unsigned or twos-complement.
Multiplier instructions include:
• Floating-point multiplication
• Fixed-point multiplication
• Fixed-point multiply/accumulate with addition, rounding optional
• Fixed-point multiply/accumulate with subtraction, rounding optional
• Rounding result register
• Saturating result register
• Clearing result register
2.6.1

Multiplier Operation

The multiplier takes two input operands, called the X input and the Y input,
which can be any data registers in the register file. Fixed-point operations can
accumulate fixed-point results in either of two local multiplier result registers
(MR) or write results back to the register file. Results stored in the MR registers
can also be rounded or saturated in separate operations. Floating-point
operations yield floating-point results, which are always written directly back
to the register file.
Input operands are transferred during the first half of the cycle. Results are
transferred during the second half of the cycle. Thus the multiplier can read
and write the same register file location in a single cycle.
If the multiplier operation is fixed-point, inputs taken from the register file are
read from the upper 32 bits of the source location. Fixed-point operands may be
treated as both in integer format or both in fractional format. The format of the
result is the same as the format of the inputs. Each fixed-point operand may be
treated as either an unsigned or a twos-complement number. If both inputs are
fractional and signed, the multiplier automatically shifts the result left one bit to
remove the redundant sign bit. The input data type is specified within the
multiplier instruction.
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