Chapter 5 Memory; Overview - Analog Devices ADSP-2106x SHARC User Manual

5.1

OVERVIEW

ADSP-2106x processors contain a large dual-ported memory for on-
chip program and data storage. On these processors, the two memory
blocks are named Block 0 and Block 1. A comparison of on-chip
memory (SRAM) available on ADSP-2106x processors is as follows:
On-chip SRAM ADSP-21060
Total Size 4 MBit
Block size (2) 2 MBit
# of 48-bit words
(per block)
# of 32-bit words
(per block)
# of 16-bit words 128K
(per block)
Addressing of up to 4 gigawords of additional, off-chip memory is also
provided through the external port of ADSP-2106x processors.
32-bit memory words are used for single-precision IEEE floating-point
data. 48-bit words contain either instructions or 40-bit extended-
precision floating-point data. In addition, the ADSP-2106x supports a
16-bit short word format which can be used for integer or fractional
data values.
The ADSP-2106x has three internal buses connected to its dual-ported
memory, the PM bus, DM bus, and I/O bus. The PM bus and DM bus
share one port of the memory and the I/O bus is connected to the
other port. The ADSP-2106x's internal PM and DM buses are
controlled by the processor core while the I/O bus is controlled by the
ADSP-2106x's on-chip I/O processor. The I/O bus allows concurrent
data transfers between either memory block and the ADSP-2106x's
communication ports (link ports, serial ports, and external port).
www.BDTIC.com/ADI
ADSP-21062
2 MBit
1 MBit
40K 20K
64K 32K
64K
Memory
ADSP-21061
1 MBit
0.5 MBit
8K
16K
32K
5 – 1
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