Table of Contents
Advertisement
1 Introduction
1.3.1.10 Instruction Set
The ADSP-21000 Family instruction set provides a wide variety of
programming capabilities. Multifunction instructions enable
computations in parallel with data transfers, as well as simultaneous
multiplier and ALU operations. The addressing power of the
ADSP-2106x gives you flexibility in moving data both internally and
externally. Every instruction can be executed in a single processor
cycle. The ADSP-21000 Family assembly language uses an algebraic
syntax for ease of coding and readability. A comprehensive set of
development tools supports program development.
1.3.2
Dual-Ported Internal Memory
The ADSP-21060 contains 4 megabits of on-chip SRAM, organized as
two blocks of 2 Mbits each, which can be configured for different
combinations of code and data storage. The ADSP-21062 includes a
2 Mbit SRAM, organized as two 1 Mbit blocks. Each memory block is
dual-ported for single-cycle, independent accesses by the core
processor and I/O processor or DMA controller. The dual-ported
memory and separate on-chip buses allow two data transfers from the
core and one from I/O, all in a single cycle.
All of the memory can be accessed as 16-bit, 32-bit, or 48-bit words.
On the ADSP-21060, the memory can be configured as a maximum of
128K words of 32-bit data, 256K words of 16-bit data, 80K words of
48-bit instructions (and 40-bit data), or combinations of different word
sizes up to 4 megabits. On the ADSP-21062, the memory can be
configured as a maximum of 64K words of 32-bit data, 128K words of
16-bit data, 40K words of 48-bit instructions (and 40-bit data), or
combinations of different word sizes up to 2 megabits. On the ADSP-
21061, the memory can be configured as a maximum of 32K words of
32-bit data, 64K words of 16-bit data, 16K words of 48-bit instructions
(and 40-bit data), or combinations of different word sizes up to 1
megabit.
A 16-bit floating-point storage format is supported which effectively
doubles the amount of data that may be stored on chip. Conversion
between the 32-bit floating-point and 16-bit floating-point formats is
done in a single instruction.
1 – 12
www.BDTIC.com/ADI
Advertisement
Table of Contents
