Alternate (Secondary) Registers - Analog Devices ADSP-2106x SHARC User Manual

2 Computation Units
If the same register file location is specified as both the source of an
operand and the destination of a result or memory fetch, the read occurs
in the first half of the cycle and the write in the second half. Thus the old
data is used as the operand before the location is updated with the new
result data. If writes to the same location take place in the same cycle, only
the write with higher precedence actually occurs. Precedence is
determined by the source of the data being written; from highest to
lowest, the precedence is:
• Data memory or universal register
• Program memory
• ALU
• Multiplier
• Shifter
The individual registers of the register file are prefixed with an "F" when
used in floating-point computations (in assembly language source code).
The registers are prefixed with an "R" when used in fixed-point
computations. The following instructions, for example, use the same
registers:
F0=F1 * F2;
R0=R1 * R2;
The F and R prefixes do not affect the 32-bit (or 40-bit) data transfer; they
only determine how the ALU, multiplier, or shifter treat the data. The F or
R may be either uppercase or lowercase; the assembler is case-insensitive.
2.9.1

Alternate (Secondary) Registers

To facilitate fast context switching, the register file has an alternate register
set. Each half of the register file—the lower half, R0 through R7, and the
upper half, R8 through R15—can independently activate its alternate
register set. Two bits in the MODE1 register select the active sets. Data can
be shared between contexts by placing the data to be shared in one half of
the register file and activating the alternate register set of the other half.
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floating-point multiply
fixed-point multiply