Loop Address Stack - Analog Devices ADSP-2106x SHARC User Manual

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3 Program Sequencing
3.5.2

Loop Address Stack

The loop address stack is six levels deep by 32 bits wide. The 32-bit word
of each level consists of a 24-bit loop termination address, a 5-bit
termination code, and a 2-bit loop type code:
Bits
Value
0-23
Loop termination address
24-28
Termination code
29
reserved (always reads 0)
30-31
Loop type code:
The loop termination address, termination code and loop type code are
stacked when a DO UNTIL or PUSH LOOP instruction is executed. The
stack is popped two instructions before the end of the last loop iteration or
when a POP LOOP instruction is issued. A stack overflows if a push
occurs when all entries in the loop stack are occupied. The stack is empty
when no entries are occupied. The overflow and empty flags are in the
sticky status register (STKY). Overflow causes a maskable interrupt.
The LADDR register contains the top of the loop address stack. It is
readable and writeable over the DM Data bus. Reading and writing
LADDR does not move the loop address stack pointer; a stack push or
pop, performed with explicit instructions, moves the stack pointer.
LADDR contains the value 0xFFFF FFFF when the loop address stack is
empty.
Because the termination condition is checked two instructions before the
end of the loop, the loop stack is popped before the end of the loop on the
final iteration. If LADDR is read at either of these instructions, the value
will no longer be the termination address for the loop.
A jump out of a loop pops the loop address stack (and the loop count
stack if the loop is counter-based) if the Loop Abort (LA) modifier is
specified for the jump. This allows the loop mechanism to continue to
function correctly. Only one pop is performed, however, so the loop abort
cannot be used to jump more than one level of loop nesting.
3 – 18
www.BDTIC.com/ADI
00 arithmetic condition-based (not LCE)
01 counter-based, length 1
10 counter-based, length 2
11 counter-based, length > 2

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