D.2 Test Access Port - Analog Devices ADSP-2106x SHARC User Manual

D JTAG Test Access Port
D.2 TEST ACCESS PORT
The test access port (TAP) of the ADSP-2106x controls the operation of
the boundary scan. The TAP consists of five pins that control a state
machine, including the boundary scan. The state machine and pins
conform to the IEEE 1149.1 specification.
TCK (input)
TMS (input)
TDI (input)
TDO (output)
TRST
(input)
A BSDL file for the ADSP-2106x is available on Analog Devices' BBS
and Internet ftp site. The BBS can be reached at:
(617) 461-4258
To connect to the ftp site, login as anonymous using your email
address for your password and type (from the Unix prompt):
ftp ftp.analog.com
D – 2
www.BDTIC.com/ADI
Test Clock. Used to clock serial data into scan latches and
control sequencing of the test state machine. TCK can be
asynchronous with CLKIN.
Test Mode Select. Primary control signal for the state
machine. Synchronous with TCK. A sequence of values on
TMS adjusts the current state of the TAP.
Test Data Input. Serial input data to the scan latches.
Synchronous with TCK.
Test Data Output. Serial output data from the scan latches.
Synchronous with TCK.
Test Reset. Resets the test state machine. Can be
asynchronous with TCK.
8 data bits, no parity, 1 stop bit,
300/1200/2400/9600/14400 baud
(or ftp 137.71.23.11)