6 DMA
Core Processor
PM Address Bus (PMA) 24
DM Address Bus (DMA) 32
PM Data Bus (PMD)
48
DM Data Bus (DMD)
32/40
* Note that link ports are not available on the ADSP-21061.
Figure 6.1 ADSP-2106x Block Diagram
6 – 2
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Internal Memory
PROCESSOR PORT
I/O PORT
ADDR
DATA
DATA
ADDR
IOD
IOA
48
17
CONTROLLER
IOP
REGISTERS
SERIAL PORTS
Control,
Status, &
Data Buffers
LINK PORTS
I/O Processor
External Port
PMA
Addr
32
EPA
Bus
Mux
DMA
HOST INTERFACE
PMD
Data
48
EPD
Bus
Mux
DMD
DMA
ADDR
31-0
DATA
47-0
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