Table 6.2 Dma Control, Buffer, & Parameter Registers - Analog Devices ADSP-2106x SHARC User Manual

6 DMA
Register Name(s)
EPB0
EPB1
EPB2
EPB3
DMAC6
DMAC7
DMAC8
DMAC9
DMASTAT
II0, IM0, C0, CP0
GP0, DB0, DA0
II1, IM1, C1, CP1
GP1, DB1, DA1
II2, IM2, C2, CP2
GP2, DB2, DA2
II3, IM3, C3, CP3
GP3, DB3, DA3
II4, IM4, C4, CP4
GP4, DB4, DA4
II5, IM5, C5, CP5
GP5, DB5, DA5
II6, IM6, C6, CP6
GP6, EI6, EM6, EC6
II7, IM7, C7, CP7
GP7, EI7, EM7, EC7
II8, IM8, C8, CP8
GP8, EI8, EM8, EC8
II9, IM9, C9, CP9
GP9, EI9, EM9, EC9
Table 6.2 DMA Control, Buffer, & Parameter Registers
1. DMA control, buffer, and parameter registers associated with the link ports are not
applicable to the ADSP-21061.
2. There are no shared DMA channels on the ADPS-21061.
3. DMA control, buffer, and parameter registers associated wiht DMA channels 8 and 9 are
not applicalbe to the ADSP-21061.
4. The IM0, IM1, IM2, and IM3 registers contain the fixed value of 1 on the ADSP-21061.
5. The DBx and DAx registers are not available on the ADSP-21061 because there is no 2-D
DMA on the ADSP-21061.
6 – 8
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Width Description
48 External Port FIFO Buffer 0
48 External Port FIFO Buffer 1
48 External Port FIFO Buffer 2
48 External Port FIFO Buffer 3
16 DMA Channel 6 Control Register
(Ext. Port Buffer 0 or Link Buffer 4)
16 DMA Channel 7 Control Register (Ext. Port Buffer 1 or
1, 2
Link Buffer 5)
16 DMA Channel 8 Control Register (Ext. Port Buffer 2)
16 DMA Channel 9 Control Register (Ext. Port Buffer 3)
32 DMA Channel Status Register
16-18 DMA Channel 0 Parameter Registers (SPORT0 Receive)
16-18 DMA Channel 1 Parameter Registers (SPORT1 Receive or
Link Buffer 0) 1, 2, 4, 5
16-18 DMA Channel 2 Parameter Registers (SPORT0 Transmit)
16-18 DMA Channel 3 Parameter Registers (SPORT1 Transmit or
Link Buffer 1) 1, 2, 4, 5
16-18 DMA Channel 4 Parameter Registers (Link Buffer 2)
16-18 DMA Channel 5 Parameter Registers (Link Buffer 3)
16-32 DMA Channel 6 Parameter Registers (Ext. Port Buffer 0 or
Link Buffer 4) 1, 2
16-32 DMA Channel 7 Parameter Registers (Ext. Port Buffer 1 or
Link Buffer 5) 1, 2
16-32 DMA Channel 8 Parameter Registers (Ext. Port Buffer 2)
16-32 DMA Channel 9 Parameter Registers (Ext. Port Buffer 3)
1, 2
3
3
4
4, 5
1, 5
1, 5
3
3