Analog Devices ADSP-2106x SHARC User Manual page 645

Control/Status Registers
added latency of the FLSH bit, it should not be set in the same
DMACx write in which the DEN bit is set. As a general rule, set
FLSH at least one cycle before setting any other DMACx control bits.
FS EPBx Buffer Status—FS is a two-bit status field that indicates
whether data is present in the EPBx buffer. When data is being
transferred out from the ADSP-2106x, these status bits indicate
whether there is room in the buffer for more data.
When data is being transferred into the ADSP-2106x, these status bits
indicate whether new (unread) data is available in the buffer.
FS Status
00 empty
01 undefined
10 partially full
11 full
MASTER Master Mode DMA Enable—The MASTER, HSHAKE, and EXTERN
bits are used in combination, as described below.
HSHAKE Handshake DMA Enable—The MASTER, HSHAKE, and EXTERN
bits are used in combination, as described below.
External Handshake Mode Enable—Specifies an external memory to
EXTERN
external device DMA transfer. HSHAKE must equal 1 and MASTER
equal 0 in this mode.
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