Analog Devices ADSP-2106x SHARC User Manual page 403

Pin Type Function
CS
I/A Chip Select. Asserted by host processor to select the
ADSP-2106x.
REDY (o/d) O Host Bus Acknowledge. The ADSP-2106x deasserts REDY
(low) to add wait states to an asynchronous access of its
internal memory or IOP registers by a host. Open drain
output (o/d) by default; can be programmed in ADREDY
bit of SYSCON register to be active drive (a/d). REDY will
only be output if the
DMAR1
I/A
DMA Request 1
DMAR2
I/A DMA Request 2
DMAG1
O/T DMA Grant 1
DMAG2
O/T DMA Grant 2
BR
I/O/S Multiprocessing Bus Requests. Used by multiprocessing
6-1
ADSP-2106xs to arbitrate for bus mastership. An
ADSP-2106x only drives its own
to the value of its ID
multiprocessor system with less than six ADSP-2106xs, the
unused
BR
own
an output.
ID I Multiprocessing ID. Determines which multiprocessing
2-0
bus request (
ID=001 corresponds to
etc. ID=000 in single-processor systems. These lines are a
system configuration selection which should be hardwired
or only changed at reset.
RPBA I/S Rotating Priority Bus Arbitration Select. When RPBA is
high, rotating priority for multiprocessor bus arbitration is
selected. When RPBA is low, fixed priority is selected. This
signal is a system configuration selection which must be
set to the same value on every ADSP-2106x. If the value of
RPBA is changed during system operation, it must be
changed in the same CLKIN cycle on every ADSP-2106x.
www.BDTIC.com/ADI
System Design
CS HBR
and inputs are asserted.
(ADSP-21060/61/62 — DMA Channel 7)
(ADSP-21060/62 — DMA Channel 8)
(ADSP-21061 — DMA Channel 6)
(ADSP-21060/61/62 — DMA Channel 7)
(ADSP-21060/62 — DMA Channel 8)
(ADSP-21061 — DMA Channel 6)
BR
x line (corresponding
inputs) and monitors all others. In a
2-0
BR
x pins should be pulled high; the processor's
x line must not be pulled high or low because it is
BR1 BR6
– ) is used by ADSP-2106x.
BR1
, ID=010 corresponds to
11
BR2
,
11 – 5