Hitachi SH7750 Hardware Manual page 506

SH7750 Series
CKIO
RD/
D63–D0
Figure 13.56 Example of 64-Bit Data Width MPX Connection
The MPX interface timing is shown below.
When the MPX interface is used for areas 1 to 6, a bus size of 32 or 64 bits should be specified in
BCR2.
For wait control, waits specified by WCR2 and wait insertion by means of the RDY pin can be
used.
In a read, one wait cycle is automatically inserted after address output, even if WCR2 is cleared to
0.
Rev. 6.0, 07/02, page 456 of 986
MPX device
CLK
I/O63–I/O0