Operation (Sh7750R); Channel Specification For A Normal Dma Transfer; Channel Specification For Ddt-Mode Dma Transfer; Transfer Channel Notification In Ddt Mode - Hitachi SH7750 Hardware Manual

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Operation (SH7750R)

Operation specific to the SH7750R is described here. For details of operation, see section 14.3,

In normal DMA transfer mode, the DMAC always operates with eight channels, and external

requests are only accepted on channel 0 (DREQ) and channel 1 (DREQ1).

After setting the registers of the channels in use, including CHCR, SAR, DAR, and DMATCR,

DMA transfer is started on receiving a DMA transfer request in the transfer-enabled state (DE = 1,

DME = 1, TE = 0, NMIF = 0, AE = 0), in the order of predetermined priority. The transfer ends

when the transfer-end condition is satisfied. There are three modes for transfer requests: auto-

request, external request, and on-chip peripheral module request. The addressing modes for DMA

transfer are the single-address mode and the dual-address mode. Bus mode is selectable between

burst mode and cycle steal mode.

For DMA transfer in DDT mode, the DMAOR.DBL setting selects either four or eight channels.

External requests are accepted on channels 0–3 when DMAOR.DBL = 0, and on channels 0–7

when DMAOR.DBL = 1. For further information on these settings, see the entry on the DBL bit in

section 14.7.5, DMA Operation Register (DMAOR).

When the DMAC is set up for four-channel external request acceptance in DDT mode

(DMAOR.DBL = 0), the ID [1:0] bits are used to notify the external device of the DMAC channel

that is to be used. For more details, see section 14.5, On-Demand Data Transfer Mode.

When the DMAC is set up for eight-channel external request acceptance in DDT mode

(DMAOR.DBL = 1), the ID [1:0] bits and the simultaneous (on the timing of TDACK assertion)

assertion of ID2 from the BAVL (bus-release notification) pin are used to notify the external

device of the DMAC channel that is to be used (see table 14.15, Notification of Transfer Channel

in Eight-Channel DDT Mode).

When the DMAC is set up for eight-channel external request acceptance in DDT mode

(DMAOR.DBL = 1), it is important to note that the BAVL pin has the two functions as shown in

table 14.16.

Rev. 6.0, 07/02, page 586 of 986

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