Hitachi SH7750 Hardware Manual page 689

Start of reception
Set MPIE bit in SCSCR1 to 1
Read ORER and FER flags
in SCSSR1
FER = 1 or ORER = 1?
Read RDRF flag in SCSSR1
Read MPIE bit in SCSCR1
No
RDRF = 1 and MPIE = 0?
Read receive data in SCRDR1
No
This station's ID?
Yes
Read ORER and FER flags
in SCSSR1
FER = 1 or ORER = 1?
Read RDRF flag in SCSSR1
RDRF = 1?
Read receive data in SCRDR1
All data received?
End of reception
Figure 15.15 Sample Multiprocessor Serial Reception Flowchart (1)
Yes
No
Yes
Yes
No
No
Yes
No
Error handling
Yes
1. ID reception cycle: Set the MPIE
bit in SCSCR1 to 1.
2. SCI status check, ID reception
and comparison: Read SCSSR1
and SCSCR1, and check that the
RDRF flag is set to 1 and MPIE
bit is set to 0, then read the
receive data in SCRDR1 and
compare it with this station's ID.
If the data is not this station's ID,
set the MPIE bit to 1 again, and
clear the RDRF flag to 0. If the
data is this station's ID, clear the
RDRF flag to 0.
3. SCI status check and data
reception: Read SCSSR1 and
check that the RDRF flag is set to
1, then read the data in SCRDR1.
4. Receive error handling and break
detection: If a receive error
occurs, read the ORER and FER
flags in SCSSR1 to identify the
error. After performing the
appropriate error handling,
ensure that the ORER and FER
flags are all cleared to 0.
Reception cannot be resumed if
either of these flags is set to 1. In
the case of a framing error, a
break can be detected by reading
the RxD pin value.
Rev. 6.0, 07/02, page 639 of 986