Tpci1
Tpci2
CKIO
A25–A0
RD/
(read)
D15–D0
(read)
(write)
D15–D0
(write)
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.53 Basic Timing for PCMCIA I/O Card Interface
Rev. 6.0, 07/02, page 452 of 986