Hitachi SH7750 Hardware Manual page 262

Table 8.3 Execution Cycles (cont)
Functional
Category
No. Instruction
Data transfer 32 MOV.W
instructions
33 MOV.L
34 MOV.B
35 MOV.W
36 MOV.L
37 MOV.B
38 MOV.W
39 MOV.L
40 MOVCA.L R0,@Rn
41 MOVT
42 OCBI
43 OCBP
44 OCBWB
45 PREF
46 SWAP.B
47 SWAP.W
48 XTRCT
Fixed-point 49 ADD
arithmetic
50 ADD
instructions
51 ADDC
52 ADDV
53 CMP/EQ
54 CMP/EQ
55 CMP/GE
56 CMP/GT
57 CMP/HI
58 CMP/HS
59 CMP/PL
60 CMP/PZ
61 CMP/STR Rm,Rn
62 DIV0S
Rev. 6.0, 07/02, page 212 of 986
Instruc-
tion
Group
R0,@(disp,Rn) LS
Rm,@(disp,Rn) LS
Rm,@(R0,Rn) LS
Rm,@(R0,Rn) LS
Rm,@(R0,Rn) LS
R0,@(disp,GBR) LS
R0,@(disp,GBR) LS
R0,@(disp,GBR) LS
LS
Rn EX
@Rn LS
@Rn LS
@Rn LS
@Rn LS
Rm,Rn EX
Rm,Rn EX
Rm,Rn EX
Rm,Rn EX
#imm,Rn EX
Rm,Rn EX
Rm,Rn EX
#imm,R0 MT
Rm,Rn MT
Rm,Rn MT
Rm,Rn MT
Rm,Rn MT
Rm,Rn MT
Rn MT
Rn MT
MT
Rm,Rn EX
Execu-
Issue tion
Rate Pattern Stage Start Cycles
Latency
1 1 #2
1 1 #2
1 1 #2
1 1 #2
1 1 #2
1 1 #3
1 1 #3
1 1 #3
1 3–7 #12
1 1 #1
1 1–2 #10
1 1–5 #11
1 1–5 #11
1 1 #2
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
1 1 #1
Lock
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MA 4 3–7
— — —
MA 4 1–2
MA 4 1–5
MA 4 1–5
— — —
— — —
— — —
— — —
— — —
— — —
— — —
— — —
— — —
— — —
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