Bus Control Register 2 (Bcr2) - Hitachi SH7750 Hardware Manual

13.2.2

Bus Control Register 2 (BCR2)

Bus control register 2 (BCR2) is a 16-bit readable/writable register that specifies the bus width for
each area, and whether a 16-bit port is used.
BCR2 is initialized to H'3FFC by a power-on reset, but is not initialized by a manual reset or in
standby mode. External memory space other than area 0 should not be accessed until register
initialization is completed.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Note: * These bits sample the values of the external pins that specify the area 0 bus size.
Bits 15 and 14—Area 0 Bus Width (A0SZ1, A0SZ0): These bits sample the external pins, MD4
and MD3 that specify the bus size in a power-on reset by the RESET pin. They are read-only bits.
Bit 15
A0SZ1
0
1
15 14
A0SZ1 A0SZ0 A6SZ1
0/1* 0/1*
R R
7 6
A3SZ1 A3SZ0 A2SZ1
1 1
R/W R/W
Bit 14
A0SZ0
0
1
0
1
13 12 11
A6SZ0 A5SZ1
1 1
R/W R/W R/W
5 4
A2SZ0 A1SZ1
1 1
R/W R/W R/W
Description
Bus width is 64 bits
Bus width is 8 bits
Bus width is 16 bits
Bus width is 32 bits
10 9
A5SZ0 A4SZ1
1 1 1
R/W R/W
3 2 1
A0SZ0 —
1 1 0
R/W —
Rev. 6.0, 07/02, page 335 of 986
8
A4SZ0
1
R/W
0
PORTEN
0
R/W