Hitachi SH7750 Hardware Manual page 76

Table 1.3 Pin Functions (cont)
Pin
No. Pin Name I/O
88 VSSQ Power
CS3
89 O
CS2
90 O
91 VDD Power
92 VSS Power
RAS
93 O
RD/CASS/
94 O
FRAME
95 RD/WR O
WE2/CAS2/
96 O
DQM2/
ICIORD
WE3/CAS3/
97 O
DQM3/
ICIOWR
WE6/CAS6/
98 O
DQM6
99 VDDQ Power
100 VSSQ Power
WE7/CAS7/
101 O
DQM7/REG
102 D23 I/O
103 D24 I/O
104 D22 I/O
105 RXD I
DREQ0
106 I
DREQ1
107 I
108 D25 I/O
109 D21 I/O
110 D26 I/O
111 D20 I/O
112 D27 I/O
113 VDDQ Power
Rev. 6.0, 07/02, page 26 of 986
Function Reset
IO GND (0 V)
Chip select 3
Chip select 2
Internal VDD
Internal GND
(0 V)
RAS
Read/CAS/
FRAME
Read/write
D23–D16 select
signal
D31–D24 select
signal
D55–D48 select
signal
IO VDD (3.3 V)
IO GND (0 V)
D63–D56 select
signal
Data
Data
Data
SCI Data input
Request from
DMAC0
Request from
DMAC1
Data
Data
Data
Data
Data
IO VDD (3.3 V)
Memory Interface
SRAM DRAM SDRAM PCMCIA MPX
CS3 CS3
(CS3)
CS2 CS2
(CS2)
RAS RAS
OE CAS
RD/WR RD/WR RD/WR
WE2 CAS2
DQM2
WE3 CAS3
DQM3
WE6 CAS6
DQM6
WE7 CAS7
DQM7
CS3
CS2
OE FRAME
RD/WR
ICIORD
ICIOWR
REG
A23
A24
A22
A25
A21
A20