Hitachi SH7750 Hardware Manual page 975

Module Item Symbol
t
I/O Output data
ports delay time
Input data t
setup time
Input data t
hold time
DREQn
DMAC t
setup time
DREQn
t
hold time
DRAKn t
delay time
INTC NMI pulse t
width (high)
NMI pulse t
width (low)
H-UDI Input clock t
cycle
t
Input clock
pulse width
(high)
Input clock t
pulse width
(low)
Input clock t
rise time
Input clock t
fall time
ASEBRK
t
setup time
ASEBRK
t
hold time
TDI/TMS t
setup time
TDI/TMS t
hold time
TDO delay t
time
ASE-PINBRK t
pulse width
Notes: *1 Pcyc: P clock cycles
*2 V = 3.0 to 3.6 V, V
DDQ
HD6417750 HD6417750
RBP240 RBP200
2
*
Min Max Min
1.5 5.3 1.5
PORTD
2 — 2.5
PORTS
1.5 — 1.5
PORTH
2 — 2.5
DRQS
1.5 — 1.5
DRQH
1.5 5.3 1.5
DRAKD
5 — 5
NMIH
30 — 30
5 — 5
NMIL
30 — 30
50 — 50
TCKcyc
15 — 15
TCKH
15 — 15
TCKL
— 10 —
TCKr
— 10 —
TCKf
10 — 10
ASEBRKS
10 — 10
ASEBRKH
15 — 15
TDIS
15 — 15
TDIH
0 10 0
TDO
2 — 2
PINBRK
= 1.5 V, Ta = –20 to +75°C, C
DD
HD6417750 HD6417750
RF240 RF200
2 2
* *
Max Min Max Min
6 1.5 6 1.5
— 3.5 — 3.5
— 1.5 — 1.5
— 3.5 — 3.5
— 1.5 — 1.5
6 1.5 6 1.5
— 5 — 5
— 30 — 30
— 5 — 5
— 30 — 30
— 50 — 50
— 15 — 15
— 15 — 15
10 — 10 —
10 — 10 —
— 10 — 10
— 10 — 10
— 15 — 15
— 15 — 15
10 0 10 0
— 2 — 2
= 30 pF, PLL2 on
L
Rev. 6.0, 07/02, page 925 of 986
2
*
Max Unit Figure
6 ns 22.65
— ns 22.65
— ns 22.65
— ns 22.66
— ns 22.66
6 ns 22.66
Normal
— t 22.71
cyc
or sleep
mode
Standby
— ns 22.71
mode
Normal
— t 22.71
cyc
or sleep
mode
Standby
— ns 22.71
mode
— ns 22.67
— ns 22.67
— ns 22.67
10 ns 22.67
10 ns 22.67
— t 22.68
cyc
— t 22.68
cyc
— ns 22.69
— ns 22.69
10 ns 22.69
1
Pcyc *
— 22.70