Hitachi SH7750 Hardware Manual page 784

Sh7750 series superh risc engine

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SCI I/O port block diagrams are shown in figures 18.3 to 18.5.

Mode setting

SPTRW: Write to SPTR

SPTRR: Read SPTR

Note: * Signals that set the SCK pin function as internal clock output or external clock input according to

the CKE0 and CKE1 bits in SCSCR1 and the C/ bit in SCSMR1.

Rev. 6.0, 07/02, page 734 of 986

Figure 18.3 MD0/SCK Pin

Internal data bus

Clock output enable signal

Serial clock output signal

Serial clock input signal

Clock input enable signal

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