Wait Control Register 2 (Wcr2) - Hitachi SH7750 Hardware Manual

13.2.6

Wait Control Register 2 (WCR2)

Wait control register 2 (WCR2) is a 32-bit readable/writable register that specifies the number of
wait states to be inserted for each area. It also specifies the data access pitch when performing
burst memory access. This enables low-speed memory to be connected without using external
circuitry.
WCR2 is initialized to H'FFFEEFFF by a power-on reset, but is not initialized by a manual reset
or in standby mode.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
31 30
A6W2 A6W1 A6W0
1 1
R/W R/W R/W
23 22
A5W0 A5B2 A5B1
1 1
R/W R/W R/W
15 14
A3W2 A3W1 A3W0
1 1
R/W R/W R/W
7 6
A1W1 A1W0 A0W2
1 1
R/W R/W R/W
29 28 27
A6B2 A6B1
1 1 1
R/W R/W
21 20 19
A5B0 A4W2
1 1 1
R/W R/W
13 12 11
— A2W2
1 0 1
R R/W
5 4 3
A0W1 A0W0
1 1 1
R/W R/W
26 25
A6B0 A5W2
1 1
R/W R/W
18 17
A4W1 A4W0
1 1
R/W R/W
10 9
A2W1 A2W0
1 1
R/W R/W
2 1
A0B2 A0B1
1 1
R/W R/W
Rev. 6.0, 07/02, page 343 of 986
24
A5W1
1
R/W
16
—
0
R
8
A1W2
1
R/W
0
A0B0
1
R/W