Break Address Register B (Barb); Break Asid Register B (Basrb); Break Address Mask Register B (Bamrb); Break Data Register B (Bdrb) - Hitachi SH7750 Hardware Manual

20.2.6

Break Address Register B (BARB)

BARB is the channel B break address register. The bit configuration is the same as for BARA.
20.2.7

Break ASID Register B (BASRB)

BASRB is the channel B break ASID register. The bit configuration is the same as for BASRA.
20.2.8

Break Address Mask Register B (BAMRB)

BAMRB is the channel B break address mask register. The bit configuration is the same as for
BAMRA.
20.2.9

Break Data Register B (BDRB)

Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Note: *: Undefined
Break data register B (BDRB) is a 32-bit readable/writable register that specifies the data (bits 31–
0) to be used in the channel B break conditions. BDRB is not initialized by a power-on reset or
manual reset.
31 30
BDB31 BDB30 BDB29
* *
R/W R/W
23 22
BDB23 BDB22 BDB21
* *
R/W R/W
15 14
BDB15 BDB14 BDB13
* *
R/W R/W
7 6
BDB7 BDB6 BDB5
* *
R/W R/W
29 28 27
BDB28 BDB27
* *
R/W R/W R/W
21 20 19
BDB20 BDB19
* *
R/W R/W R/W
13 12 11
BDB12 BDB11
* *
R/W R/W R/W
5 4
BDB4 BDB3
* *
R/W R/W R/W
26 25
BDB26 BDB25
* * *
R/W R/W
18 17
BDB18 BDB17
* * *
R/W R/W
10 9
BDB10 BDB9
* * *
R/W R/W
3 2 1
BDB2 BDB1
* * *
R/W R/W
Rev. 6.0, 07/02, page 781 of 986
24
BDB24
*
R/W
16
BDB16
*
R/W
8
BDB8
*
R/W
0
BDB0
*
R/W