Table 18.2 Sci I/O Port Pins; Table 18.3 Scif I/O Port Pins - Hitachi SH7750 Hardware Manual

Table 18.2 shows the SCI I/O port pin configuration.

Table 18.2 SCI I/O Port Pins

Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Note: Pins MD0/SCK and MD7/TxD function as mode input pins MD0 and MD7 after a power-on
reset. They are made to function as serial pins by performing SCI operation settings with
the TE, RE, CKEI, and CKE0 bits in SCSCR1 and the C/A bit in SCSMR1. Break state
transmission and detection can be performed by means of a setting in the SCI's SCSPTR1
register.
Table 18.3 shows the SCIF I/O port pin configuration.

Table 18.3 SCIF I/O Port Pins

Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Modem control pin
Modem control pin
Note: The MRESET/SCK2 pin functions as the MRESET manual reset pin when a manual reset is
executed. The MD1/TxD2, MD2/RxD2, and MD8/RTS2 pins function as the MD1, MD2, and
MD8 mode input pins after a power-on reset. These pins are made to function as serial pins
by performing SCIF operation settings with the TE and RE bits in SCSCR2 and the MCE bit
in SCFCR2. Break state transmission and detection can be set in the SCIF's SCSPTR2
register.
Rev. 6.0, 07/02, page 740 of 986
Abbreviation
MD0/SCK
RxD
MD7/TxD
Abbreviation I/O
MRESET/SCK2
Input
MD2/RxD2 Input
MD1/TxD2 Output
CTS2
I/O
MD8/RTS2 I/O
I/O Function
I/O Clock input/output
Input Receive data input
Output Transmit data output
Function
Clock input
Receive data input
Transmit data output
Transmission enabled
Transmission request