Hitachi SH7750 Hardware Manual page 683

Sh7750 series superh risc engine
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Start
1
bit
Serial
0
D0
D1
data
RDRF
FER
Figure 15.11 Example of SCI Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
Data
Parity
Stop
bit
bit
D7
0/1
1
RXI interrupt
request
One frame
Start
Data
bit
0
D0
D1
D7
SCRDR1 data read and
RDRF flag cleared to 0
by RXI interrupt handler
Rev. 6.0, 07/02, page 633 of 986
Parity
Stop
bit
bit
0/1
0
0/1
ERI interrupt request
generated by framing
error

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