Figure 22.13 Control Signal Timing; Figure 22.14 Pin Drive Timing For Standby Mode - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine

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Normal operation

STATUS 0, STATUS 1

A25–A0, D63–D0

DACKn, DRAKn, SCK,

Note: * When the PHZ bit in STBCR is set to 1, these pins go to the high-impedance state (except

for pins being used as port pins, which retain their port state).

Rev. 6.0, 07/02, page 870 of 986

Figure 22.13 Control Signal Timing

Standby mode

Normal operation

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