Hitachi SH7750 Hardware Manual page 389

Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bits 31 to 5    Reserved: These bits are always read as 0, and should only be written with 0.
Bits 4 to 0    Asynchronous Input: These bits enable asynchronous input to the corresponding
pin.
Bits 4 to 0: ASYNCn
0
1
Bit
4
3
2
1
0
31 30 29
— — —
0 0 0
R R R
23 22 21
— — —
0 0 0
R R R
15 14 13
— — —
0 0 0
R R R
7 6 5
— — —
0 0 0
R R R
Description
Input to corresponding pin is synchronous with CKIO
Input to corresponding pin can be asynchronous with CKIO
Corresponding Pin
IOIS16
DREQ1
DREQ0
BREQ
RDY
28 27 26
— — —
0 0
R R
20 19 18
— — —
0 0
R R
12 11 10
— — —
0 0
R R
4 3
ASYNC
0 0
R/W R/W R/W
Rev. 6.0, 07/02, page 339 of 986
25 24
— —
0 0 0
R R R
17 16
— —
0 0 0
R R R
9 8
— —
0 0 0
R R R
2 1 0
0 0 0
R/W R/W
(Initial value)