Figure 9.13 Hardware Standby Mode Timing (When Ca = Low In Wdt Operation) - Hitachi SH7750 Hardware Manual

Note: * High impedance when STBCR2. STHZ = 0
Interrupt request
CKIO
CA
(High)
SCK2
(High)
Standby
STATUS
WDT count
Figure 9.13 Hardware Standby Mode Timing
(When CA = Low in WDT Operation)
WDT overflow
Standby *
Normal
0–10 Bcyc
Rev. 6.0, 07/02, page 245 of 986