Figure 22.33 Synchronous Dram Bus Cycle: Synchronous Dram Precharge Command (Tpc[2:0] = 001) - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine

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Notes: IO: DACK device

SA: Single address DMA transfer

DA: Dual address DMA transfer

DACK set to active-high

Figure 22.33 Synchronous DRAM Bus Cycle: Synchronous DRAM Precharge Command

Precharge-sel

(TPC[2:0] = 001)

Rev. 6.0, 07/02, page 895 of 986

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