Hitachi SH7750 Hardware Manual page 305

Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bits 15 to 12—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 11—Clock Output Enable (CKOEN): Specifies whether a clock is output from the CKIO
pin or the CKIO pin is placed in the high-impedance state. When the CKIO pin goes to the high-
impedance state, operation continues at the operating frequency before this state was entered.
When the CKIO pin becomes high-impedance, it is pulled up.
Bit 11: CKOEN
0
1
Note: * It is not pulled up in hardware standby mode.
Bit 10—PLL Circuit 1 Enable (PLL1EN): Specifies whether PLL circuit 1 is on or off.
Bit 10: PLL1EN
0
1
Bit 9—PLL Circuit 2 Enable (PLL2EN): Specifies whether PLL circuit 2 is on or off.
Bit 9: PLL2EN
0
1
15 14 13
— —
0 0
R/W R/W R/W
7 6
IFC1 IFC0 BFC2
— —
R/W R/W R/W
Description
CKIO pin goes to high-impedance state (pulled up*)
Clock is output from CKIO pin
Description
PLL circuit 1 is not used
PLL circuit 1 is used
Description
PLL circuit 2 is not used
PLL circuit 2 is used
12 11
— — CKOEN PLL1EN PLL2EN
0 0 1
R R/W
5 4 3
BFC1 BFC0
— — —
R/W R/W
10 9
1 1
R/W R/W
2 1
PFC2 PFC1
— —
R/W R/W
(Initial value)
(Initial value)
(Initial value)
Rev. 6.0, 07/02, page 255 of 986
8
IFC2
—
R/W
0
PFC0
—
R/W