Table 22.34 Control Signal Timing (2) - Hitachi SH7750 Hardware Manual

Table 22.34 Control Signal Timing (2)

Item Symbol Min
BREQ setup
t
BREQS
time
BREQ hold
t
BREQH
time
BACK delay
t
BACKD
time
Bus tri-state t
BOFF1
delay time
Bus tri-state t
BOFF2
delay time
to standby
mode
Bus buffer t
BON1
on time
Bus buffer t
BON2
on time from
standby
STATUS0/1 t
STD1
delay time
STATUS0/1 t
STD2
delay time
to standby
Notes: *1 V = 3.0 to 3.6 V, V
DDQ
*2 V = 3.0 to 3.6 V, V
DDQ
(HD6417750F167, HD6417750SF167, HD6417750SF200)
V = 3.0 to 3.6 V, V
DDQ
(HD6417750F167I, HD6417750SF167I)
*3 V = 3.0 to 3.6 V, V
DDQ
HD6417750
SVF133
HD6417750 HD6417750
VF128 SVBT133
* 1 * 1
Max Min Max
3.5 — 3.5 —
1.5 — 1.5 —
— 10 — 10
— 15 — 15
— 2 — 2
— 15 — 15
— 1 — 1
— 11 — 11
— 2 — 2
= typ. 1.5 V, Ta = –20 to +75°C, C
DD
= typ. 1.8 V, Ta = –20 to +75°C, C
DD
= typ. 1.8 V, Ta = –40 to +85°C, C
DD
= typ. 1.8 V, Ta = –20 to +75°C, C
DD
HD6417750
F167
HD6417750
F167I
HD6417750
SF167
HD6417750 HD6417750
SF167I BP200M
HD6417750 HD6417750
SF200 SBP200
* 2 * 3
Min Max Min Max
3.5 — 3 —
1.5 — 1.5 —
— 8 — 6
— 12 — 10
— 2 — 2
— 12 — 10
— 1 — 1
— 9 — 7
— 2 — 2
= 30 pF, PLL2 on
L
= 30 pF, PLL2 on
L
= 30 pF, PLL2 on
L
= 30 pF, PLL2 on
L
Rev. 6.0, 07/02, page 869 of 986
Unit Figure Notes
ns 22.13
ns 22.13
ns 22.13
ns 22.13
t 22.14
cyc
ns 22.13
t 22.14
cyc
ns 22.14
t 22.14
cyc