Break Asid Register A (Basra); Break Address Mask Register A (Bamra) - Hitachi SH7750 Hardware Manual

20.2.3

Break ASID Register A (BASRA)

Bit:
Initial value:
R/W:
Note: *: Undefined
Break ASID register A (BASRA) is an 8-bit readable/writable register that specifies the ASID
used in the channel A break conditions. BASRA is not initialized by a power-on reset or manual
reset.
Bits 7 to 0—Break ASID A7 to A0 (BASA7–BASA0): These bits hold the ASID (bits 7–0) used
in the channel A break conditions.
20.2.4

Break Address Mask Register A (BAMRA)

Bit:
Initial value:
R/W:
Note: *: Undefined
Break address mask register A (BAMRA) is an 8-bit readable/writable register that specifies
which bits are to be masked in the break ASID set in BASRA and the break address set in BARA.
BAMRA is not initialized by a power-on reset or manual reset.
Bits 7 to 4—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 2—Break ASID Mask A (BASMA): Specifies whether all bits of the channel A break ASID7
to ASID0 (BASA7–BASA0) are to be masked.
Bit 2: BASMA
0
1
Rev. 6.0, 07/02, page 778 of 986
7 6
BASA7 BASA6 BASA5
* *
R/W R/W
7 6
— —
0 0
R R
Description
All BASRA bits are included in break conditions
No BASRA bits are included in break conditions
5 4
BASA4 BASA3
* *
R/W R/W R/W
5 4
— — BAMA2 BASMA BAMA1 BAMA0
0 0
R R R/W
3 2 1
BASA2 BASA1
* * *
R/W R/W
3 2 1
* * *
R/W R/W
0
BASA0
*
R/W
0
*
R/W