Dsp Boot Configuration Register (Dsp_Boot_Config); Dsp Side - Texas Instruments OMAP5910 Reference Manual

DSP Subsystem Reset, Clocking, Idle Control, and Boot
12.4.2.2 Boot Mode Selection
Figure 108. DSP Boot Configuration Register (DSP_BOOT_CONFIG)

DSP Side

16
MPU Side
31
Note: R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
Table 104. DSP Boot Configuration Register (DSP_BOOT_CONFIG) Field Descriptions
Bits Field
31−4 Reserved
3−0 BOOT_MODE
12.4.3 Boot Modes
230 DSP Subsystem
The bootloader mode (or boot mode) used by the bootloader is specified by
the MPU core using
(DSP_BOOT_CONFIG). This register is read-only for the DSP and is mapped
to address 0x000F in the DSP I/O space (within the DSP TIPB address space).
The MPU can read and write to this register at address 0xFFFE C918 (within
the MPUI address space). The MPU controls the boot process by
programming the BOOT_MODE bits while the DSP subsystem is held in its
reset state. Figure 108 and Table 104 show the details of the DSP boot
configuration register.
Reserved
R-0
Reserved
R-0
Value Description
These bits are not used.
DSP subsystem bootloader mode bits. These bits specify the boot
mode used by the DSP bootloader.
There are five boot modes for the DSP bootloader. The MPU core can select
any of these boot modes by writing to the DSP_BOOT_CONFIG register.
When the DSP subsystem is released from reset (boot), the DSP core always
fetches the interrupt vector table starting at byte address 0xFF FF00. The
physical location of this address depends on the boot mode selected through
the BOOT_MOD bits. If BOOT_MOD bits are equal to 0000b, the on-chip
PDROM is disabled and the boot address is located off-chip. If BOOT_MOD
is not equal to 0000b, the on-chip PDROM is enabled and the boot address
is located on the on-chip PDROM.
the DSP Boot Configuration
4
4
Register
3 0
BOOT_MODE
R-0
3 0
BOOT_MODE
RW-0
SPRU890A