Mpu Shared Peripherals; Dsp Shared Peripherals - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

OMAP5912 Description
Table 3.

MPU Shared Peripherals

Peripheral Name
USB On-The-Go
RTC
µWire
HDQ/1-Wire
MPUIO
Memory stick interface
FAC
PWT
PWL
2 X LPG
OS timer
SoSSI
MMC/SDIO1
Table 4.

DSP Shared Peripherals

Peripheral Name
McBSP1
McBSP3
2 X MCSI
22
Introduction
General Description
A combination of the USB client and USB host used in OMAP5910, including
an additional module (OTG module)
An embedded real-time clock module
A serial interface that connects external devices such as EEPROM or LCD
with µWire standard
Implements the hardware protocol of the master function of the Benchmark
HDQ and the Dallas Semiconductor 1-Wire protocol
Provides MPU GPIOs (general-purpose I/Os) and a keypad interface
Memory storage device
Frame adjustment counter
Pulse width time
Pulse width length
Two instances of a light pulse generation (LPG) module
32-kHz OS timer used in OMAP5910
A parallel display interface for smart displays. The output implements one
8-bit or 16-bit parallel bus between display driver and master. There are five
control pins and one tearing effect pin. The bus is bidirectional.
Multimedia card interface, compatible with secure digital memory card
interface version 1.0
Description
Can be used to interface with I2S audio codec
Can be used as optical audio interface
Two instances of an MCSI module
All of the DSP shared peripherals are also accessible by the MPU through the
OMAP 3.2 gigacell MPUI internal port.
SPRU748A

Advertisement

Table of Contents
loading

Table of Contents