Full-Handshaking And Ready Pin Usage In Asynchronous Read Mode - Texas Instruments OMAP5912 Reference Manual

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Asynchronous 32-Bit Read Operation on a 16-Bit Width Device. RDWST=4

FCLKDIV=0 OESETUP = 1 OEHOLD = 1 ADVHOLD = 0 BTWST=0 BTMODE=0. Data

write-back on the bus after read completion.

FLASH.A(25:1)

FLASH.D(15:0)

FLASH.BE(1:0)

Full-Handshaking and Ready Pin Usage in Asynchronous Read Mode

Valid address 0

In full-handshaking mode, the READY input pin (FLASH.RDY on ball V2)

is monitored by the EMIFS to control read access time. The access is

completed when internal wait state RDWST expires and FLASH.RDY is

asserted by the external device.

ADV pulse width time and OE assertion time are not dependent on the

FLASH.RDY pin state.

When FLASH.RDY is used to extend the access time, the access

completion is not controlled by internal delay generation. CS, OE, and

address are deactivated when FLASH.RDY is detected high. No

OEHOLD time can be control in this case and the bit field must be equal

Since FLASH.RDY is an asynchronous signal, a nonready device must

drive FLASH.RDY low enough time ahead of the minimum access time

completion. Depending on FLASH.RDY assertion low delay from CS

Valid address 1

OMAP3.2 Subsystem

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