Omap5912 Top-Level Detailed Diagram - Texas Instruments OMAP5912 Reference Manual

OMAP5912 Description
Figure 2.

OMAP5912 Top-Level Detailed Diagram

OSC
OSC
CompactFlash ctrl
Boot ROM
Secure eFuse
Secure RAM
Security layer
Frame
buffer
VLYNQ
SSI
SSR
GDD
SST
USB On-The-Go
20 Introduction
ULPD APLL
JTAG, production ID,
32
MPU private bus
EMIFS
EMIFF
OCP-T1
OCP-T2
OCPI
OMAP3.2
MPU public bus
32
Static switches
8 X GPTIMER
SPI M/S
3 X UART (1,2,3)
I 2 C
MMC/SDIO2
McBSP2
Test
(ETLM, BOM, SCM,
Die ID,
eFUSE ctl)
16
DSP
private
bus
DSP P
MPU P
16
DSP S
MPU S
LCD/
LCD W
Dynamic switches
GPIO1
GPIO2
GPIO3
GPIO4
32K
SynchroCounter
DSP DMA handler
DSP Inth L2.1
System DMA
handler
MCSI1
MPU Inth L2
MCSI2
Secure watchdog
McBSP3
OMAP5912
McBSP1
configuration
RNG
HDQ/1-Wire
DES/3DES
µWire
32K watchdog
MMC/SDIO1
SHA-I/MP5
MPUIO
LCDCONV
Camera IF
DSP shared bus LPG1
LPG2
32
SoSSI
CCP
RTC
PWL
Dynamic switches
PWT
STI
FAC
OS timer
SPRU748A