Mode 1−2−3− Asynchronous Page Mode Read Operation - Texas Instruments OMAP5912 Reference Manual

Traffic Controller
Figure 18. Asynchronous 32-Bit Write Operation on 16-Bit Multiplexed Address and Data
Memory (WELEN = 2, WRWST =1, FCLKDIV =0, BTWST = 0, and BTMODE = 1)
TC_CLK
REF_CLK
FLASH.CLK
FLASH.CSx
FLASH.ADV
FLASH.A(25:16)
FLASH.A/D(15:0)
FLASH.WE
FLASH_DIR_O
FLASH.BE(1:0)
FLASH.RDY
3.2.10 Mode 1−2−3− Asynchronous Page Mode Read Operation
52 OMAP3.2 Subsystem
M
D0
VA
VA0 D0
N
P cycles
-
The asynchronous page mode read 1−2−3 is selected by setting the
RDMODE bit field in the corresponding EMIFS chip-select configuration
register.
J
RDMODE = 1 selects the 4 words per page mode
J
RDMODE = 2 selects the 8 words per page mode
J
RDMODE = 3 selects the 16 words per page mode
-
This mode provides single access or fast consecutive accesses in a page.
Optimized access time for 2×word16 read (word32 read in 16-bit width
device) and for burst read (4×word32 or 8×Word16 in case of 16-bit width
device). During consecutive accesses the EMIFS increments the address
after each word read completion.
-
The word length of the access is equal to the memory data bus width and
is defined by the BW field of the CS configuration register (see Table 19).
-
The delay for the first word in the page is controlled by RDWST bit field in
the CS configuration register (initial wait state). Depending on the device
Low
N
VA
VA1
Q
N
Low
00
D1
D1
Q
P cycles
SPRU749A