Read Retimed Protocol - Texas Instruments OMAP5912 Reference Manual

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Asynchronous 16-Bit Write Operation on a 16-Bit Width Device (RDMODE =

5, WRWST=2, WELEN=4 FCLKDIV=00 and ADVHOLD=1)

FLASH.A(25:1)

FLASH.D(15:0)

FLASH.BE(1:0)

Read Retimed Protocol

OMAP3.2 Subsystem

The RT bit in the EMIFS chip−select configuration register may be

set only in RDMODE 4,5 and 7 only. The system hangs if the

retiming bit is set in other modes (asynchronous modes because

the retiming logic depends on the returned flash clock. In

asynchronous mode, there is no flash clock and the system hangs.

Due to IC I/O and board delays, the theoretical external memory maximum

frequency may not be usable for REF_CLK value without retiming

function. In synchronous mode 4−5, the retiming mode allows read data

to be latched by a delayed Ret_REF_CLK obtained through the IC IO

feedback of FLASH.CLK. This offers optimum data and sampling clock

Retiming mode enables a pipelined read access. Compared to

non-retimed access, the first access takes one extra REF_CLK cycle and

the following accesses in a burst take one REF_CLK cycle each.

Valid address

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