Mmc/Sdio Block Connection - Texas Instruments OMAP5912 Reference Manual

OMAP5912 Description
Figure 20.

MMC/SDIO Block Connection

OMAP5912
L4 controller
Chip
50 Introduction
The following combination of external devices is supported:
-
One or more MMC memory cards sharing the same bus and up to four
devices with 8-bit SPI protocol interface (serial flash memories, and so on)
-
One single SD memory card or SDIO card and up to four devices with 8-bit
SPI protocol interface
MMC.CMD/SPI.DO
MMC/SDIO
MMC.DAT0/SPI.DI
host
controller
The main features of the MMC/SDIO module are:
-
Full compliance with MMC command/response sets as defined in the
MMC standard specifications v.3.1
-
Full compliance with SD command/response sets as defined in the SD
physical layer specifications v.1.0
-
Full compliance with SDIO command/response sets as defined in the
SDIO card specification v1.0
OMAP5912 also supports control signals to external level shifters in case the
voltage for OMAP5912 I/O is set to 1.8 V. These signals are derived from the
direction control of the MMC_DAT0 and MMC_CMD I/O pads (one direction
control per data bit line and one direction control for the command line).
MMC_POW
MMC.CLK
MMC.DAT[3:1]
SPI.CLK
SPI.RDY
SPI.C/CS3
VDD
Power switch
MMC card(s)
SPI
devices
VDD backplane
SPRU748A