Table B.2.1M Branch 1 Instructions (31 Instructions) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

Mnemonic #
BZ / BEQ rel 2
BNZ / BNE rel 2
BC / BLO rel 2
BNC / BHS rel 2
BN rel 2
BP rel 2
BV rel 2
BNV rel 2
BT rel 2
BNT rel 2
BLT rel 2
BGE rel 2
BLE rel 2
BGT rel 2
BLS rel 2
BHI rel 2
BRA rel 2
JMP @A 1
JMP addr16 3
JMP @ear 2
JMP @eam 2+
JMPP @ear *1 2
JMPP @eam *1 2+
JMPP addr24 4
CALL @ear *2 2
CALL @eam *2 2+
CALL addr16 *3 3
CALLV #vct4 *3 1
CALLP @ear *4 2
CALLP @eam *4 2+
CALLP addr24 *5 4
*1: 4 when branching, 3 when not branching.
*2: 3 × (c) + (b)
Note 1: Read (word) branch address.
Note 2: W: Save (word) into stack; R: read (word) branch address.
Note 3: Save (word) into stack.
Note 4: W: Save (long-word) into W stack; R: read (long-word) R branch address.
Note 5: Save (long-word) into stack.
Note: For an explanation of "(a)" to "(d)" in the colunm "B", see Table B.2d and Table B.2e.
MB90580 Series

Table B.2.1m Branch 1 Instructions (31 Instructions)

~ RG B
*1 0 0 Branch when (Z) = 1
*1 0 0 Branch when (Z) = 0
*1 0 0
Branch when (C) = 1
*1 0 0 Branch when (C) = 0
*1 0 0 Branch when (N) = 1
*1 0 0 Branch when (N) = 0
*1 0 0 Branch when (V) = 1
*1 0 0 Branch when (V) = 0
*1 0 0 Branch when (T) = 1
*1 0 0 Branch when (T) = 0
*1 0 0 Branch when (V) xor (N) = 1
*1 0 0 Branch when (V) xor (N) = 0
*1 0 0 Branch when ((V) xor (N)) or (Z) = 1
*1 0 0 Branch when ((V) xor (N)) or (Z) = 0
*1 0 0 Branch when (C) or (Z) = 1
*1 0 0 Branch when (C) or (Z) = 0
*1 0 0 Unconditional branching
word (PC) ← (A)
2 0 0
word (PC) ← addr16
3 0 0
word (PC) ← (ear)
3 1 0
word (PC) ← (eam)
4+(a) 0 (c)
word (PC) ← (ear), (PCB) ← (ear+2)
5 2 0
word (PC) ← (eam), (PCB) ← (eam+2)
6+(a) 0 (d)
word (PC) ← ad24 0-15, (PCB) ← ad24 16-23
4 0 0
word (PC) ← (ear)
6 1 (c)
word (PC) ← (eam)
7+(a) 0 2×(c)
word (PC) ← addr16
6 0 (c)
7 0 2×(c) Vector call instruction
word (PC) ← (ear) 0-15, (PCB) ← (ear)16-23
10 2 2×(c)
word (PC) ← (eam) 0-15,
11+(a) 0 *2
(PCB) ← (eam)16-23
word (PC) ← addr0-15, (PCB) ← addr16-23
10 0 2×(c)
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