Interrupt Disable Instructions - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
2.9

Interrupt Disable Instructions

Interrupt requests are not accepted about following 10 instructions:
MOV ILM, #imm8
AND CCR, #imm8
■ Interrupt Disable Instructions
As shown in Figure 2.9-1, if a valid hardware interrupt request occurs during execution of any of the above
instructions, the interrupt can be processed only when an instruction other than the above is executed.
Interrupt request generated
■ Restrictions on Interrupt Disable Instructions and Prefix Instructions
As shown in Figure 2.9-2, when a prefix code is placed before an interrupt disable instruction, the prefix
code affects the first instruction after the code other than the interrupt disable instruction.
MOV A, FFH
CCR:XXX10XX
B
■ Consecutive Prefix Codes
As shown in Figure 2.9-3, when competitive prefix codes are placed consecutively, the latter one becomes
valid.
Competitive prefix codes are PCB, ADB, DTB, and SPB.
• • • • •
CM44-10137-6E
PCB SPB
ADB CMR
Figure 2.9-1 Interrupt Disable Instructions
Interrupt disable instructions
• • • • • • • •
Figure 2.9-2 Interrupt Disable Instructions and Prefix Codes
Interrupt disable instructions
NCC MOV ILM,#imm8
Figure 2.9-3 Consecutive Prefix Codes
Prefix codes
ADB DTB
FUJITSU MICROELECTRONICS LIMITED
OR CCR, #imm8 NCC
POPW PS DTB
(a)
Interrupt accepted
• • • •
PCB ADD A,01H
PCB becomes valid as
the prefix code
CHAPTER 2 CPU
2.9 Interrupt Disable Instructions
• • •
: Ordinary instruction
(a)
ADD A,01H
CCR:XXX10XX
CCR does not change with NCC.
• • • • •
B
43