ST STM32L4+ Series Reference Manual page 1900

Serial audio interface (SAI)
SAI1
SAI2
53.4.5 Audio data size
The audio frame can target different data sizes by configuring bit DS[2:0] in the SAI_xCR1
register. The data sizes may be 8, 10, 16, 20, 24 or 32 bits. During the transfer, either the
MSB or the LSB of the data are sent first, depending on the configuration of bit LSBFIRST in
the SAI_xCR1 register.
53.4.6 Frame synchronization
The FS signal acts as the Frame synchronization signal in the audio frame (start of frame).
The shape of this signal is completely configurable in order to target the different audio
protocols with their own specificities concerning this Frame synchronization behavior. This
reconfigurability is done using register SAI_xFRCR.
SCK
(FSOFF = 0)
(FSOFF = 1)
In AC'97 mode or in SPDIF mode (bit PRTCFG[1:0] = 10 or PRTCFG[1:0] = 01 in the
SAI_xCR1 register), the frame synchronization shape is forced to match the AC'97 protocol.
The SAI_xFRCR register value is ignored.
Each audio block is independent and consequently each one requires a specific
configuration.
Frame length
•
Master mode
The audio frame length can be configured to up to 256 bit clock cycles, by setting
FRL[7:0] field in the SAI_xFRCR register.
If the frame length is greater than the number of declared slots for the frame, the
remaining bits to transmit will be extended to 0 or the SD line will be released to HI-z
1900/2301
Table 372. External synchronization selection
Block instance
FS active: up to 128 bits
FS
The falling edge can occur into this area
SD
Slot 0 Slot 1
SD
Slot 0 Slot 1
SYNCIN= 3 SYNCIN= 2
Reserved Reserved
Reserved Reserved
Figure 547
Figure 547. Audio frame
FS Length: up to 256 bits
Slot 2 Slot 3
Slot 2 Slot 3
RM0432 Rev 6
SYNCIN= 1 SYNCIN= 0
SAI2 sync. Reserved
Reserved SAI1 sync.
illustrates this flexibility.
Slot 4 ......
Slot 4 ......
RM0432
Slot 0
Slot 0
MSv30037V2