ST STM32L4+ Series Reference Manual page 1910

Serial audio interface (SAI)
The data processing sequence into the PDM is the following:
1. The PDM interface builds the bitstream clock from the bit clock received from the TDM
interface of SAI_A.
2. The bitstream data received from the microphones (SAI_D[n]) are de-interleaved and
go through a 7-bit delay line in order to fine-tune the delay of each microphone with the
accuracy of the bitstream clock.
3. The shift registers translate each serial bitstream into bytes.
4. The last operation consists in shifting-out the resulting bytes to SAI_A via the serial
data line of the TDM interface.
Figure 554
de-interleaver.
Note: The PDM interface does not embed the decimation filter required to build-up the PCM audio
samples from the bitstream. It is up to the application software to perform this operation.
To saia_sd_in
From saia_fs_out
From saia_sck_out
1. n refers to the number of data lines and p to the number of microphone pairs.
The PDM interface can be enabled through the PDMEN bit in SAI_PDMCR register.
However the PDM interface must be enabled prior to enabling SAI_A block.
To reduce the memory footprint, the user can select the amount of microphones the
application needs. This can be done through MICNBR[1:0] bits. It is possible to select
between 2,4,6 or 8 microphones. For example, if the application is using 3 microphones, the
user has to select 4.
1910/2301
hereafter shows the block diagram of PDM interface, with a detailed view of a
Figure 554. Detailed PDM interface block diagram
PDM_IF
PDMEN
SAI register interface
De-Interleaver n
8
shift reg
8
shift reg
RM0432 Rev 6
8
8
De-Interleaver1
8
8
De-Interleaver2
8
De-Interleaver3
8
Control
Logic
DLYM[4:1]L,
MICNBR
DLYM[4:1]R
delay line
delay line
pdm_ck
CKEN[2:1]
DLYMpL
SAI_D[n]
DLYMpR
RM0432
SAI_D1
SAI_D2
SAI_D3
SAI_CK1
SAI_CK2
MSv46163V3