Input And Output Clocks - Texas Instruments TMS320C6201 Manual

Fixed-point digital signal processor
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timing requirements for CLKIN
NO.
1
t
Cycle time, CLKIN
c(CLKIN)
2
t
Pulse duration, CLKIN high
w(CLKINH)
3
t
Pulse duration, CLKIN low
w(CLKINL)
4
t
Transition time, CLKIN
t(CLKIN)
The reference points for the rise and fall transitions are measured at V
C = CLKIN cycle time in ns. For example, when CLKIN frequency is 50 MHz, use C = 20 ns.
CLKIN
switching characteristics over recommended operating conditions for CLKOUT1
(see Figure 12)
NO.
NO.
1
t
Cycle time, CLKOUT1
c(CKO1)
2
t
Pulse duration, CLKOUT1 high
w(CKO1H)
3
t
Pulse duration, CLKOUT1 low
w(CKO1L)
4
t
Transition time, CLKOUT1
t(CKO1)
§
P = 1/CPU clock frequency in ns.
The reference points for the rise and fall transitions are measured at V
#
PH is the high period of CLKIN in ns and PL is the low period of CLKIN in ns.
CLKOUT1

INPUT AND OUTPUT CLOCKS

†‡
(see Figure 11)
Figure 11. CLKIN Timings
PARAMETER
PARAMETER
Figure 12. CLKOUT1 Timings
POST OFFICE BOX 1443
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS051H -- JANUARY 1997 -- REVISED MARCH 2004
CLKMODE
0.4C
0.4C
MAX and V
MIN.
IL
IH
1
4
2
3
CLKMODE = X4
MIN
MAX
P -- 0.7
P + 0.7
(P/2) -- 0.5
(P/2 ) + 0.5
(P/2) -- 0.5
(P/2 ) + 0.5
0.6
MAX and V
MIN.
OL
OH
1
4
2
3
HOUSTON, TEXAS 77251--1443
TMS320C6201
- -200
CLKMODE
= x4
= x1
MIN
MAX
MIN
MAX
20
5
0.45C
0.45C
5
0.6
4
§¶#
- -200
CLKMODE = X1
MIN
MAX
P -- 0.7
P + 0.7
PH -- 0.5
PH + 0.5
PL -- 0.5
PL + 0.5
0.6
4
UNIT
ns
ns
ns
ns
UNIT
UNIT
ns
ns
ns
ns
31

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