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8.5 Power Consumption - Power Modes
When measured on the CC1312PSIP-EM reference design with T
otherwise noted.
PARAMETER
Core Current Consumption
Reset
Shutdown
Standby
without cache retention
I
core
Standby
with cache retention
Idle
I
Active
core
Peripheral Current Consumption
Peripheral power
domain
Serial power domain
RF Core
µDMA
Timers
I
I2C
peri
I2S
SSI
UART
CRYPTO (AES)
PKA
TRNG
Sensor Controller Engine Consumption
Active mode
I
SCE
Low-power mode
(1)
Only one UART running
(2)
Only one SSI running
(3)
Only one GPTimer running
(4)
CC1312PSIP integrates a 100 kΩ pull-up resistor on nRESET
Copyright © 2023 Texas Instruments Incorporated
TEST CONDITIONS
Reset. RESET_N pin asserted or VDDS below power-on-reset threshold
Shutdown. No clocks running, no retention
RTC running, CPU, 80KB RAM and (partial) register retention.
RCOSC_LF
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF
Supply Systems and RAM powered
RCOSC_HF
MCU running CoreMark at 48 MHz
RCOSC_HF
Delta current with domain enabled
Delta current with domain enabled
Delta current with power domain enabled,
clock enabled, RF core idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
Delta current with clock enabled, module is idle
24 MHz, infinite loop
2 MHz, infinite loop
Product Folder Links:
= 25 °C, V
= 3.6 V with DC/DC enabled unless
c
DDS
(4)
(3)
(2)
(1)
CC1312PSIP
CC1312PSIP
SWRS293 – NOVEMBER 2023
TYP
UNIT
36
µA
150
nA
0.9
µA
1.0
2.8
µA
2.9
590
µA
2.89
mA
82
5.5
179
54
68
µA
8.2
22
70
141
21
71
30
808
µA
30.1
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